At this year's Advancing AI 2026 (hereinafter referred to as AAI 2026) conference, AMD unveiled the EPYC 9006 series server processors, codenamed "Venice." Built on the Zen 6 architecture and manufactured using TSMC's next-generation 2nm process, it is AMD's first microarchitecture designed from the ground up for data center scenarios to meet the demands of AI workloads.
According to Wccftech, Zen 6 processors recently appeared in the GeekBench database, specifically the flagship EPYC 9996. It features 256 cores/512 threads, with 256MB of L2 cache and 1GB of L3 cache, and a configurable TDP ranging from 400W to 600W. At a boost frequency of 4.12GHz, it achieved single-core and multi-core benchmark scores of 2847 and 68427, respectively.
Although the EPYC 9996's performance may not appear particularly impressive at first glance, its clock frequency must be taken into account. For comparison, the Zen 5-based EPYC 4545P achieves a single-core benchmark score of 3064 at a boost frequency of 5.5GHz. When converted and compared with the EPYC 9996's results, it becomes evident that Zen 6 delivers approximately 24% higher performance per clock cycle than Zen 5 on a single core.
According to previously released AMD developer documentation, Zen 6 is not an incremental upgrade over Zen 4/5 but introduces a completely revamped high-throughput wide architecture, equipped with an 8-wide instruction scheduling engine and continuing support for Simultaneous Multithreading (SMT) technology. Additionally, the cores feature dedicated counters for monitoring idle scheduling windows, backend pipeline stalls, and more. AMD also maintains support for the 512-bit AVX-512 instruction set, compatible with FP64/FP32/FP16/BF16 formats, including FMA/MAC operations and mixed floating-point/integer vector execution (VNNI/AES/SHA, etc.).
For the AM5 platform targeting desktops, AMD has prepared Olympic Ridge, and we believe many will be eager to see the performance of this processor.